Fault detection system for an arithmetic unit

Details Fault detection system for an arithmetic unit Fault detection system for an arithmetic unit

1988-03-25

1990-02-06

Atkinson, Charles E.

Boots, shoes, and leggings

G06F 1110

Patent

active

048993034

ABSTRACT:
A fault detection system for an arithmetic unit includes a shift-and-add type multiplier which is capable of both normal multiplication and division for calculating a quotient as a product of a dividend and an approximated reciprocal of a divisor, a modulo 3 emulator emulating the multiplier in modulo 3 arithmetic, a modulo 3 converter converting the multiplication result of the multiplier into a modulo 3 equivalent, an error detector comparing outputs from the modulo 3 converter and the modulo 3 emulator to detect a bit error, and a control unit. The control unit supplies, to the modulo 3 emulator and the modulo 3 converter, a control signal representing either a normal multiplication mode, a multiplication mode for calculating a product of a divisor and a reciprocal of the divisor, a multiplication mode for calculating a product of a dividend and a reciprocal of a divisor, or a multiplication mode for generating a partial quotient in a division process. The control unit also controls generation of modulo 3 equivalents in the modulo 3 emulator and the modulo 3 converter.

REFERENCES:
patent: 3816728 (1974-06-01), Chen et al.
patent: 4181969 (1980-01-01), Smith, Jr.
patent: 4213188 (1980-07-01), Smolko et al.

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