Fishing – trapping – and vermin destroying
Patent
1987-08-11
1988-03-22
Ozaki, George T.
Fishing, trapping, and vermin destroying
437 57, 437107, 437133, H01L 21203, H01L 21205, H01L 21265
Patent
active
047328703
ABSTRACT:
A semiconductor device, e.g., a complementary circuit comprising an n-channel transistor (Q.sub.n) utilizing a two-dimensional electron gas and a p-channel transistor (Q.sub.p) utilizing a two-dimensional hole gas, comprises: a semi-insulating GaAs substrate; a channel layer of an i-type GaAs having n.sup.+ -type source and drain regions and p.sup.+ -type source and drain regions; a buffer layer of an i-type AlGaAs preventing carriers from passing therethrough; first and second control layers of GaAs or AlGaAs having n-type or p-type conductivity, these layers being epitaxially formed in sequence on the substrate by an MBE method or an MOCVD method; and metal electrodes formed on the first and second control layers, n.sup.+ -type regions and p.sup.+ -type regions.
REFERENCES:
patent: 3673471 (1972-06-01), Klein et al.
patent: 4151635 (1979-05-01), Kashkooli et al.
patent: 4538165 (1985-08-01), Chang et al.
patent: 4583105 (1986-04-01), Rosenberg
Patent Abstracts of Japan, vol. 8, No. 161 (E-257), [1598], 26th Jul. 1984; & JP-A-59, 61166 (Fujitsu K.K.), Apr. 7, 1984.
Patent Abstracts of Japan, vol. 7, No. 264 (E-212), [1409], 24th Nov. 1983; & JP-A-58 147167 (Fujitsu K.K.), Sep. 1, 1983.
Patents Abstracts of Japan, vol. 7, No. 136, (E-181), [1281], 14th Jun. 1983; & JP-A-58 51574 (Fujitsu K.K.), 26-03-1983.
Fujitsu Limited
Ozaki George T.
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