Circuit arrangement capable of quickly processing an interrupt i

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G06F 946

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active

048376744

ABSTRACT:
In a virtual machine comprising a plurality of execution processing units (15a, 15b) which may be operated in compliance with individual operating systems, an interrupt request is delivered from an I/O interrupt start circuit (24) to all of the execution processing units to make a destination one (15a) of the execution processing units carry out an interrupt processing operation. When an undestined one (15b) of the execution processing units responds to the interrupt request, the undestined processing unit initializes or enables the interrupt processing operation of the destination processing unit by the use of an interrupt start circuit (28b). Interrupt information related to the interrupt request is sent from an I/O write-in circuit (23) to a first retaining area (21) and moved from the first retaining area to a second retaining area (22) through the undestined processing unit. The destination processing unit starts the interrupt processing operation by the use of the interrupt information.

REFERENCES:
patent: 4253145 (1981-02-01), Goldberg
patent: 4400769 (1983-08-01), Kaneda et al.
patent: 4493034 (1985-01-01), Angelle et al.

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