Method for manufacturing a DRAM having a second effective capaci

Fishing – trapping – and vermin destroying

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437195, 437915, H01L 2172

Patent

active

052964027

ABSTRACT:
A semiconductor memory device and a method for manufacturing the same, capable of increasing the effective cell capacitor area by virtue of steps each defined between a semiconductor substrate surface and each field oxide film formed over the semiconductor substrate. Over the semiconductor substrate, a thin film MOSFET is formed, which includes a charge storage electrode and an active region both connected with a charge storage electrode of each memory cell through a charge storage contact hole. With this structure, a second effective capacitor area is obtained, thereby enabling the capacitance to increase. Also, the semiconductor substrate is connected with a substrate of the thin film MOSFET by a substrate contact hole. Accordingly, it is possible to control the electrical characteristic of the thin film MOSFET. In spite of a decrease in cell area, a higher charge storage capacity can be also obtained.

REFERENCES:
patent: 5006481 (1991-04-01), Chan et al.
patent: 5073510 (1991-12-01), Kwon et al.
patent: 5104822 (1992-04-01), Butler
patent: 5122476 (1992-06-01), Fazan et al.
patent: 5219781 (1993-06-01), Yoneda

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