Method of fabricating a heterojunction bipolar transistor

Details Method of fabricating a heterojunction bipolar transistor Method of fabricating a heterojunction bipolar transistor

1992-01-06

1994-03-22

Hearn, Brian E.

Fishing, trapping, and vermin destroying

437133, 437 7, 148DIG72, H01L 21265

Patent

active

052963896

ABSTRACT:
On a semi-insulating substrate, an emitter layer (or a collector layer), a base layer, a compound semiconductor layer containing In and a collector layer (or an emitter layer) are provided. The collector layer (or the emitter layer) is patterned to form a collector region (or an emitter region). When the base surface is revealed by a reactive ion beam etching, the etching will be stopped at the compound semiconductor layer that contains In. Consequently, the nonuniformity in the base resistance that depends on the thickness of the base lead-out region can be reduced.

REFERENCES:
patent: 4939562 (1990-07-01), Adlerstein
patent: 5024958 (1991-06-01), Awano

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