Method of making a monolithic integrated circuit comprising at l

Fishing – trapping – and vermin destroying

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357 34, 357 91, 437 34, 437 39, 437203, H01L 21302, H01L 21265

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047866101

ABSTRACT:
In this method, said emitter area (6) and said collector area of a bipolar transistor are each covered with a portion (71, 72) of an oxidation mask layer in a conventional manner. After implantation of ions of said conductivity type of said base region, an oxide stripe (21) surrounding said emitter are (6) is formed by thermal oxidation. After removal of said portions (71, 72) of said oxidation mask layer, successive layers (9, 10) are deposited which consist at least of a top layer (10) and an underlying doped silicide layer (9). Using a masked anisotropic etching process through said oxide stripe (21), said successive layers (9, 10) are divided into said emitter electrode (61) and said collector electrode (32), out of which said emitter region (4) and said collector contact region (31) are diffused.

REFERENCES:
patent: 4640721 (1987-02-01), Uehara et al.
patent: 4641416 (1987-02-01), Iranmanesh et al.
patent: 4721685 (1988-01-01), Lindenfelser et al.
patent: 4729965 (1988-03-01), Tamaki et al.
patent: 4731341 (1988-03-01), Kawakatsu

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