Multiplier with hybrid register

Details Multiplier with hybrid register Multiplier with hybrid register

1982-12-02

1986-01-14

Thomas, James D.

Boots, shoes, and leggings

364900, G06F 752

Patent

active

045649200

ABSTRACT:
An integrated-circuit CPU saves layout space by employing the Address Register as the Extension Register for multiplication operations, the Address Register being modified to include shifting hardware.

REFERENCES:
patent: 3539791 (1970-11-01), Herger et al.
patent: 4086474 (1978-04-01), Negi et al.
patent: 4096566 (1978-06-01), Borie et al.
patent: 4158233 (1979-06-01), Olander, Jr. et al.
patent: 4287566 (1981-09-01), Culler
patent: 4325116 (1982-04-01), Kranz et al.
patent: 4328395 (1982-05-01), Henderson
patent: 4354225 (1982-10-01), Frieder et al.
patent: 4434461 (1984-02-01), Puhl
patent: 4441201 (1984-04-01), Henderson et al.
"High-Speed Parallel Multiplication", Digital System Modules Application Note, 1963.
Waser, "High-Speed Monolithic Multipliers for Real-Time Digital Signal Processing", IEEE Computer, Oct. 1978, pp. 19-29.
Parasuraman, "Hardware Multiplication Techniques for Microprocessor Systems", Computer Design, Apr. 1977, pp. 75-82.

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