Method for plating tab leads in an assembled semiconductor packa

Details Method for plating tab leads in an assembled semiconductor packa Method for plating tab leads in an assembled semiconductor packa

1990-07-31

1991-12-24

Chaudhuri, Olik

Fishing, trapping, and vermin destroying

437246, 437247, 437248, 148269, 148282, 427 98, 427433, 427437, C25D 330

Patent

active

050752588

ABSTRACT:
A method for improving the bonding characteristics of TAB semiconductor packages to circuit boards is achieved by plating additional amounts of tin on the TAB semiconductor package leads after final package assembly is complete. Residues from the plating step are removed from the package assembly to prevent contamination. Stresses that were developed in the plated material during the plating step are removed by heating the leads.

REFERENCES:
patent: 3988518 (1976-08-01), McGrath
patent: 4065625 (1977-12-01), Iwai et al.
patent: 4234631 (1980-11-01), Davis
patent: 4486511 (1984-12-01), Chen et al.
patent: 4695481 (1987-09-01), Kawamata et al.
patent: 4776508 (1988-10-01), Tanny
patent: 4883774 (1989-11-01), Djennas et al.
Binary Alloy Phase Diagrams, American Society for Metals, 1986, p. 965.
Hackh's Chemical Dictionary, McGraw-Hill, Inc., 1969, p. 351.

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