Method of producing insulated gate bipolar tranistor

Details Method of producing insulated gate bipolar tranistor Method of producing insulated gate bipolar tranistor

1990-10-10

1991-07-23

Hearn, Brian E.

Fishing, trapping, and vermin destroying

437 31, 437 40, 437 41, 437233, 437235, 437247, 148DIG126, H01L 21336

Patent

active

050343360

ABSTRACT:
The present invention relates to a method of producing an insulated gate bipolar transistor, of a vertical insulated gate field effect transistor. In the present invention a window portion is formed on a low-temperature oxide film and a polysilicon layer deposited on a polysilicon layer, which serves as a gate, and the ions of impurities are implanted while using these as a mask, thereby forming a P-base layer. The ions of impurities are then again implanted using this mask to form a P.sup.++ layer instead of using a conventional resist mask. Accordingly, in the present invention, the P.sup.++ layer is formed in self alignment with the edge of the polysilicon gate. Since there is no positional deviation due to inaccurate mask positioning which may be produced when a mask such as a resist is used, positional accuracy is enhanced which hereby eliminates latchup.

REFERENCES:
patent: 4417385 (1983-11-01), Temple
patent: 4430792 (1984-02-01), Temple
patent: 4466176 (1984-08-01), Temple
patent: 4680853 (1987-07-01), Lidow et al.
patent: 4774198 (1988-09-01), Contiero et al.
patent: 4810665 (1989-03-01), Chang et al.

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