Patent
1987-12-09
1989-06-06
James, Andrew J.
357 16, 357 15, 357 61, 357 232, H01L 2980, H01L 29205
Patent
active
048376051
ABSTRACT:
For improvement in gate leakage current, there is disclosed a hetero-MIS gate type field effect transistor comprising (a) an indium-phosphide semi-insulating substrate, (b) an indium-phosphide active layer formed on a surface of the semi-insulating substrate, (c) an aluminum-gallium-arsenide layer formed on a surface of the indium-phosphide active layer, (d) a metal gate electrode formed on the aluminum-gallium-arsenide layer, and (e) source and drain electrodes formed on the indium-phosphide active layer and located at the both sides of the metal gate electrode, and the aluminum-gallium-arsenide layer has the highest aluminum atom composition at the upper surface portion contacting the metal gate electrode and the lowest aluminum atom composition at the lower surface portion contacting the indium-phosphide active layer, so that a discontinuity takes place between the indium-phosphide active layer and the aluminum-gallium-arsenide layer and a higher Schottky barrier is provided between the aluminum-gallium-arsenide layer and the gate electrode, thereby preventing the field effect transistor from the large gate leakage current.
REFERENCES:
patent: 4117504 (1978-09-01), Maslov et al.
patent: 4745447 (1988-05-01), Chen et al.
patent: 4757358 (1988-07-01), Hovel et al.
Ohno et al., IEEE Elec. Dev. Letters, vol. EDL-1, No. 8, Aug. 1980, "Double Hetero Ga.sub..47 In.sub..53 As MESFETS by MBE", pp. 154-155.
Itoh Tomohiro
Kasahara Kensuke
Ohata Keiichi
Jackson, Jr. Jerome
James Andrew J.
NEC Corporation
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