Control system optimization via digital diode emulation

Details Control system optimization via digital diode emulation Control system optimization via digital diode emulation

2008-05-09

2011-12-06

Laxton, Gary L (Department: 2838)

Electricity: power supply or regulation systems

Output level responsive

Using a three or more terminal semiconductive device as the...

C323S285000

Reexamination Certificate

active

08072204

ABSTRACT:
The operation of a voltage regulator (or point-of-load regulator) may be optimized, by performing diode emulation using the low-side output transistor (LS FET). The voltage regulator may be monitored for a specified trigger event, which may include an averaged value of the load current dropping below a threshold value, and upon recognizing the trigger event, one or more of a number of possible diode emulation algorithms may be enabled. In one algorithm, the duty-cycle of the LS FET control signal may be set to a specified value, then adjusted until the duty-cycle of the high-side output transistor (HS FET) control signal settles and steady state is reached. The duty-cycle of the LS FET control signal may then be adjusted, and the duty-cycle of the HS FET control signal monitored, until the monitoring indicates that the duty-cycle of the HS FET control signal has reached a minimum value, thereby optimizing operation of the voltage regulator with respect to power loss. The averaged current may be based on actual load current measurements, or it may be calculated. In the latter case, discontinuous operation of the regulator may be determined based on the duty-cycle of the HS FET control signal deviating from its highest value.

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