Computer-aided design and analysis of circuits and semiconductor – Integrated circuit design processing – Layout editor
Reexamination Certificate
2007-08-13
2011-11-22
Doan, Nghia (Department: 2825)
Computer-aided design and analysis of circuits and semiconductor
Integrated circuit design processing
Layout editor
C716S118000, C716S119000, C716S120000, C716S121000, C716S122000, C716S126000, C716S127000, C716S128000, C716S129000, C716S130000
Reexamination Certificate
active
08065652
ABSTRACT:
Various embodiments of the invention comprise methods and systems for determining when or whether to use hard rules or preferred rules during global routing of an electronic design. In some embodiments, the entire routable space is first routed with hard rules during global routing while ensuring the design may be embedded. The design is then analyzed with preferred rules where the overcongested areas are marked as “use hard rule” and areas not overcongested are marked as “use preferred rule.” The methods or the systems thus ensure that the design remains routable throughout the process while improving timing, manufacturability, or yield by reserving routing space for the preferred rules.
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Houck Charles T.
Salowe Jeffrey Scott
Cadence Design Systems Inc.
Doan Nghia
Vista IP Law Group LLP
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