Semiconductor nonvolatile memory device

Details Semiconductor nonvolatile memory device Semiconductor nonvolatile memory device

2010-05-25

2011-11-22

Pham, Ly D (Department: 2827)

Static information storage and retrieval

Floating gate

Particular biasing

C365S185050, C365S185200, C365S185220, C365S185280, C365S185290, C365S185300, C365S185330

Reexamination Certificate

active

08064261

ABSTRACT:
An operation scheme for operating stably a semiconductor nonvolatile memory device is provided.When hot-hole injection is conducted in the semiconductor nonvolatile memory device of a split gate structure, the hot-hole injection is verified using a crossing point that does not change with time. Thus, an erased state can be verified without being aware of any time-varying changes.Also, programming or programming/erasure is conducted by repeating pulse voltage or multi-step voltage application to a gate section multiple times.

REFERENCES:
patent: 5642312 (1997-06-01), Harari
patent: 5914896 (1999-06-01), Lee et al.
patent: 5969383 (1999-10-01), Chang et al.
patent: 6040994 (2000-03-01), Naura
patent: 6279070 (2001-08-01), Jeong et al.
patent: 6477084 (2002-11-01), Eitan
patent: 7035147 (2006-04-01), Yeh et al.
patent: 7212444 (2007-05-01), Hisamoto et al.
patent: 2003/0218897 (2003-11-01), Kato et al.
patent: 2004/0155234 (2004-08-01), Ishimaru et al.
patent: 2005/0095769 (2005-05-01), Takase et al.
patent: 2005/0237813 (2005-10-01), Zous et al.
patent: 2005/0265080 (2005-12-01), Hisamoto et al.
patent: 2005/0286299 (2005-12-01), Tomita et al.
patent: H07-169284 (1995-07-01), None
patent: 2000-251485 (2000-09-01), None
patent: 2003-046002 (2003-02-01), None
patent: 2003-346484 (2003-12-01), None
patent: WO 03/073431 (2003-09-01), None
A.T. Wu et al., “A Novel High-Speed, 5-Volt Programming EPROM Structure with Source-Side Injection,” 1986 IEEE, International Electronic Device Meeting, Technical Digest, pp. 584-587.
T.Y. Chan et al., “The Impact of Gate-Induced Drain Leakage Current on MOSFET Scaling”, 1987 IEEE, International Electronic Device Meeting, Technical Digest, pp. 718-721.
W.J. Tsai et al., “Data Retention Behavior of a SONOS Type Two-Bit Storage Flash Memory Cell”, 2001 IEEE, International Electronic Device Meeting, Technical Digest, pp. 719-722.
Sze, “Physics of Semiconductor Devices, 2ndedition”, John Wiley & Sons, 1981, pp. 496-506.
Sze, “Physics of Semiconductor Devices, 2ndedition”, John Wiley & Sons, 1981, pp. 447.
Sze, “Physics of Semiconductor Devices, 2ndedition”, John Wiley & Sons, 1981, pp. vii-1.
W. Chen et al., A novel Flash Memory Device withSPlit Gate Source SideInjection and ONO Charge Storage Stack (SPIN), 1997 Symposium on VLSI Technology, pp. 63-64.
Japanese Office Action dated Aug. 31, 2010 received in counterpart Japanese application (and English translation thereof).

Affiliated with

Also associated with

Rating

Semiconductor nonvolatile memory device does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Semiconductor nonvolatile memory device, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Semiconductor nonvolatile memory device will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-4304930