On-chip embedded thermal antenna for chip cooling

Active solid-state devices (e.g. – transistors – solid-state diode – Gate arrays – With particular signal path connections

Reexamination Certificate

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Details

C257S621000, C257S707000, C257SE23080

Reexamination Certificate

active

08053814

ABSTRACT:
An apparatus comprises a first layer within a semiconductor chip having active structures electrically connected to other active structures and having electrically isolated first inactive structures. A second layer within the semiconductor chip is physically connected to the first layer. The second layer comprises an insulator and has second inactive structures. The first inactive structures are physically aligned with the second inactive structures.

REFERENCES:
patent: 4716308 (1987-12-01), Matsuo et al.
patent: 5955781 (1999-09-01), Joshi et al.
patent: 6100199 (2000-08-01), Joshi et al.
patent: 6333557 (2001-12-01), Sullivan
patent: 6512292 (2003-01-01), Armbrust et al.
patent: 6773952 (2004-08-01), Armbrust et al.

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