Efficient clock models and their use in simulation

Details Efficient clock models and their use in simulation Efficient clock models and their use in simulation

2005-02-28

2011-10-11

Rodriguez, Paul (Department: 2123)

Data processing: structural design, modeling, simulation, and em

Simulating electronic device or electrical system

Timing

C713S375000

Reexamination Certificate

active

08036873

ABSTRACT:
Methods simulating a system of devices are described. A model that simulates the system is executed. The system model includes a plurality of modules. A clock object for a module can be disabled when it is not needed or not being used.

REFERENCES:
patent: 4899273 (1990-02-01), Omoda et al.
patent: 5502689 (1996-03-01), Peterson et al.
patent: 5550760 (1996-08-01), Razdan et al.
patent: 5694579 (1997-12-01), Razdan et al.
patent: 6009256 (1999-12-01), Tseng et al.
patent: 6058492 (2000-05-01), Sample et al.
patent: 6152612 (2000-11-01), Liao et al.
patent: 6292765 (2001-09-01), Ho et al.
patent: 6625572 (2003-09-01), Zemlyak et al.
patent: 6789219 (2004-09-01), Hapke et al.
patent: 6996747 (2006-02-01), Swoboda et al.
patent: 7143322 (2006-11-01), Hapke
patent: 7203632 (2007-04-01), Milne et al.
patent: 7277839 (2007-10-01), Feldmann et al.
patent: 2002/0069027 (2002-06-01), Hapke
patent: 2003/0093584 (2003-05-01), Bian
patent: 2003/0171908 (2003-09-01), Schilp et al.
patent: 2004/0130558 (2004-07-01), MacInnis et al.
patent: 2005/0081170 (2005-04-01), Hyduke et al.
patent: 2005/0209839 (2005-09-01), Nightingale et al.
patent: 2006/0195310 (2006-08-01), Vermeersch et al.
patent: 1998-0032143 (1998-07-01), None
Daniel Gracia Perez, Gilles Mouchard, Olivier Temem; A Fast SystemC Engine; Feb. 16, 2004; http://hal.inria.fr/inria-00001108/en/.
Himanshu Bhatnagar; Advanced ASIC Chip Synthesis Using Synopsys® Design Compiler™ Physical Compiler™ and PrimeTime®; Second Edition; 2002; Springer; ISBN 978-0/7923-7644-6 (Print) 978-0-306-47507-8 (Online); pp. 4 and 5.
Robert Siegmund, Dietmar Muller; SystemCSV: An Extension of SystemC for Mixed Multi-Level Communication Modeling and Interface-Based System Design; Feb. 2001, Proceedings of the Design, Automation and Test in Europe (Date) Conference; pp. 26-32.
Ernst Ulrich and Dennis Hebert, Speed and accuracy in digital network simulation based on structural modeling, 1982, Proceedings of the 19th conference on Design automation, ISBN:0-89791-020-6, pp. 587-593.
C. A. Valderrama et al.; “Automatic Generation of Interfaces for Distributed C-VHDL Cosimulation of Embedded Systems: an Industrial Experience”; Jun. 19-21, 1996; Rapid System Prototyping; Proceedings of the Seventh IEEE International Workshop on Thessaloniki, Greece; pp. 72-77.
Andrew S. Tanenbaum, “Structured Computer Organization”, © 1984, pp. 10-12.

Affiliated with

Also associated with

Rating

Efficient clock models and their use in simulation does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Efficient clock models and their use in simulation, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Efficient clock models and their use in simulation will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-4289745