Semiconductor package with a reduced volume and thickness...

Details Semiconductor package with a reduced volume and thickness... Semiconductor package with a reduced volume and thickness...

2007-09-12

2011-10-25

Landau, Matthew (Department: 2813)

Active solid-state devices (e.g., transistors, solid-state diode

Combined with electrical contact or lead

Of specified material other than unalloyed aluminum

C257S686000, C257S698000, C257S773000, C257SE23011

Reexamination Certificate

active

08044516

ABSTRACT:
A semiconductor package includes a semiconductor chip provided with a bonding pad disposed over a surface thereof; a through electrode passing from the surface to a second surface opposing the first surface and connected electrically with the bonding pad; and a redistribution disposed at the second surface and connected electrically with the through electrode. An embodiment of the present invention is capable of significantly reducing the thickness and volume of the semiconductor package. It is also capable of high speed operation since the path of the signal inputted and/or outputted from the semiconductor package is shortened. It is capable of stacking easily at least two semiconductor packages having a wafer level, and it is capable of significantly reducing parasitic capacitance.

REFERENCES:
patent: 2002/0071935 (2002-06-01), Wu
patent: 2004/0266066 (2004-12-01), Wang
patent: 2005/0104228 (2005-05-01), Rigg et al.
patent: 2006/0043535 (2006-03-01), Hiatt
patent: 2006/0043569 (2006-03-01), Benson et al.
patent: 2006/0148250 (2006-07-01), Kirby
patent: 2006/0197206 (2006-09-01), Kim et al.
patent: 2006/0252232 (2006-11-01), Usui et al.
patent: 1020050039132 (2005-04-01), None

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