Semiconductor package

Active solid-state devices (e.g. – transistors – solid-state diode – Housing or package – With contact or lead

Reexamination Certificate

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Details

C257S666000, C257S670000, C257SE23031, C257SE23043, C257SE23079, C361S773000, C361S813000

Reexamination Certificate

active

08058720

ABSTRACT:
A semiconductor package includes a die pad; a semiconductor die mounted on the die pad; a plurality of leads in a first horizontal plane disposed along peripheral edges of the die pad; a ground bar downset from the first horizontal plane to a second horizontal plane between the leads and the die pad; a plurality of downset tie bars connecting the ground bar with the die pad; a plurality of ground wires bonding to both of the ground bar and the die pad; and a molding compound at least partially encapsulating the die pad, inner ends of the leads such that bottom surface of the die pad is exposed within the molding compound.

REFERENCES:
patent: 6388311 (2002-05-01), Nakashima et al.
patent: 6437427 (2002-08-01), Choi
patent: 6627977 (2003-09-01), Foster
patent: 6630373 (2003-10-01), Punzalan et al.
patent: 6876069 (2005-04-01), Punzalan et al.
patent: 7230323 (2007-06-01), Lee et al.
patent: 7242077 (2007-07-01), Ma et al.
patent: 2003/0160309 (2003-08-01), Punzalan et al.
patent: 2004/0061204 (2004-04-01), Han et al.
patent: 2004/0238921 (2004-12-01), Lee et al.
patent: 2005/0029638 (2005-02-01), Ahn et al.
patent: 20020007875 (2002-01-01), None

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