Reference voltage generation circuit and bias circuit

Details Reference voltage generation circuit and bias circuit Reference voltage generation circuit and bias circuit

2009-04-03

2011-11-01

Berhane, Adolf (Department: 2838)

Electricity: power supply or regulation systems

Self-regulating

Using a three or more terminal semiconductive device as the...

C327S538000

Reexamination Certificate

active

08049483

ABSTRACT:
A reference voltage generation circuit comprises: a first depletion mode FET; a second depletion mode FET; a first resistor; a first bipolar transistor; a second resistor; a second bipolar transistor; a third bipolar transistor; a third resistor; a third depletion mode FET having its drain connected to a second end of the first resistor and to the collector of the first bipolar transistor; and a fourth bipolar transistor having its base and collector connected to the gate and the source of the third depletion mode FET, and its emitter grounded, wherein source voltage of the second depletion mode FET is output as a reference voltage.

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patent: 2008/0111525 (2008-05-01), Fukuzawa
patent: 2004-343244 (2004-12-01), None

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