Static information storage and retrieval – Floating gate – Particular biasing
Reexamination Certificate
2010-06-18
2011-10-25
Le, Vu (Department: 2824)
Static information storage and retrieval
Floating gate
Particular biasing
C365S185210, C365S207000, C365S210100
Reexamination Certificate
active
08045388
ABSTRACT:
The present invention provides a semiconductor memory and a control method therefor, the semiconductor device including a first current-voltage conversion circuit (16) connected to a core cell (12) provided in a nonvolatile memory cell array (10), a second current-voltage conversion circuit (26) connected to a reference cell (22) through a reference cell data line (24), a sense amplifier (18) sensing an output from the first current-voltage conversion circuit and an output from the second current-voltage conversion circuit, a compare circuit (28) comparing a voltage level at the reference cell data line with a predefined voltage level, and a charging circuit (30) charging the reference cell data line, if the voltage level at the reference cell data line is lower than the predefined voltage level during pre-charging the reference cell data line. According to the present invention, the pre-charging period of the reference cell data line can be shortened, and the data read time can be shortened.
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Ogawa Akira
Yano Masaru
Le Vu
Spansion LLC
Yang Han
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