Static information storage and retrieval – Floating gate – Particular biasing
Reexamination Certificate
2009-03-18
2011-10-18
Luu, Pho M (Department: 2824)
Static information storage and retrieval
Floating gate
Particular biasing
C365S189050, C365S189160, C365S207000, C365S236000
Reexamination Certificate
active
08040735
ABSTRACT:
A memory cell array has a plurality of memory cells arrayed in row and column directions. A plurality of sense amplifier units includes a plurality of sense amplifiers detecting write completion of each of the memory cells selected for each row. A plurality of detection units is arranged correspondingly to the sense amplifier units, and forms a transfer path for transferring potential in accordance with a detection output signal of each sense amplifier unit. The detection units detect a sense amplifier unit corresponding to a portion where the transfer path breaks off, as a sense amplifier unit including write incompletion bit.
REFERENCES:
patent: 5566113 (1996-10-01), Saito et al.
patent: 2006/0291291 (2006-12-01), Hosono et al.
patent: 2006-277786 (2006-10-01), None
patent: 2007-102942 (2007-04-01), None
Bui Tha-o
Kabushiki Kaisha Toshiba
Luu Pho M
Oblon, Spivak McClelland, Maier & Neustadt, L.L.P.
LandOfFree
Semiconductor memory device capable of detecting write... does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Semiconductor memory device capable of detecting write..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Semiconductor memory device capable of detecting write... will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-4283342