Methods and apparatus for programming a memory cell using...

Details Methods and apparatus for programming a memory cell using... Methods and apparatus for programming a memory cell using...

2010-06-22

2011-10-25

Nguyen, Tuan (Department: 2824)

Static information storage and retrieval

Floating gate

Particular biasing

C365S185170, C365S185030, C365S185240, C365S185260, C365S185290

Reexamination Certificate

active

08045386

ABSTRACT:
Methods and apparatus for programming a memory cell using one or more blocking memory cells facilitate mitigation of capacitive voltage coupling. The methods include applying a program voltage to a selected memory cell of a string of memory cells, and applying a cutoff voltage to a set of one or more memory cells of the string between the selected memory cell and a select gate. The methods further include applying a pass voltage to one or more other memory cells of the string between the selected memory cell and the select gate. Other methods further include applying other pass voltages, other cutoff voltages and/or intermediate voltages to still other memory cells of the string.

REFERENCES:
patent: 6930921 (2005-08-01), Matsunaga et al.
patent: 7161833 (2007-01-01), Hemink
patent: 7525841 (2009-04-01), Aritome
patent: 7561469 (2009-07-01), Aritome
patent: 2005/0105334 (2005-05-01), Futasuyama
patent: 2005/0174852 (2005-08-01), Hemink
patent: 2007/0236992 (2007-10-01), Oowada

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