Computer graphics processing and selective visual display system – Plural physical display element control system – Display elements arranged in matrix
Patent
1996-04-19
1999-03-02
Zimmerman, Mark K.
Computer graphics processing and selective visual display system
Plural physical display element control system
Display elements arranged in matrix
345114, G06F 1500
Patent
active
058777415
ABSTRACT:
A system and method for processing overlay display data. A display FIFO pipeline processes background graphics display data and a separate overlay FIFO pipeline processes overlay display data stored in an off-screen part of a graphics memory. The overlay FIFO pipeline performs format conversion, interpolation and scaling on the overlay display data and outputs it to an overlay mux. The overlay mux selects between the outputs of the display FIFO pipeline and the overlay FIFO pipeline in the processing of each scan line.
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IBM Technical Disclosure Bulletin, vol. 36, No. 4, Apr. 1993, New York US, pp. 189-191, XP000364483 "RAMDAC Enhancement for Double Buffered Graphics Systems".
Chee Lawrence P.
Mulvenna John David
Kovalick Vincent E.
Seiko Epson Corporation
Watson Mark P.
Zimmerman Mark K.
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