Computer graphics processing and selective visual display system – Display driving control circuitry – Display power source
Reexamination Certificate
2008-02-11
2011-12-13
Beck, Alexander S (Department: 2629)
Computer graphics processing and selective visual display system
Display driving control circuitry
Display power source
C345S204000
Reexamination Certificate
active
08077172
ABSTRACT:
In an image display system, when a sequence of frames α, α+1, α+2, α+3, . . . , with a frame rate of m is given as an input video signal S1, a controller controls a frame memory to output a sequence of frames α, α+2, . . . , as an output video signal S2at a frame rate of m/2 and a sequence of frames α+1, α+3, . . . , as an output video signal S3at a frame rate of m/2 such that the timing of outputting each of frames α+1, α+3, . . . , of the output video signal S3is delayed by 1/m with respect of the timing of outputting each of frames α, α+2, . . . , of the output video signal S2. By displaying the output video signals S3and S2in the above-described manner, a resultant motion image formed by a combination of the output video signals S3and S2is refreshed at an effective frame rate of m.
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Kuroki Yoshihiko
Nishi Tomohiro
Beck Alexander S
Said Mansour M
Sony Corporation
Wolf Greenfield & Sacks P.C.
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