Active solid-state devices (e.g. – transistors – solid-state diode – Thin active physical layer which is – Heterojunction
Reexamination Certificate
2006-04-04
2011-10-11
Fahmy, Wael (Department: 2814)
Active solid-state devices (e.g., transistors, solid-state diode
Thin active physical layer which is
Heterojunction
C257SE33009, C257SE31035, C438S286000, C438S300000
Reexamination Certificate
active
08035098
ABSTRACT:
The present invention is directed to a transistor with an asymmetric silicon germanium source region, and various methods of making same. In one illustrative embodiment, the transistor includes a gate electrode formed above a semiconducting substrate comprised of silicon, a doped source region comprising a region of epitaxially grown silicon that is doped with germanium formed in the semiconducting substrate and a doped drain region formed in the semiconducting substrate.
REFERENCES:
patent: 5578865 (1996-11-01), Vu et al.
patent: 6207977 (2001-03-01), Augusto
patent: 6858506 (2005-02-01), Chang
patent: 2002/0000622 (2002-01-01), Yamakawa et al.
patent: 2005/0130454 (2005-06-01), Murthy et al.
patent: 2006/0046406 (2006-03-01), Chindalore et al.
patent: 2006/0258072 (2006-11-01), Kavalieros et al.
patent: 2006/0292776 (2006-12-01), Jin et al.
Buller James F.
Chen Jian
Sultan Akif
Fahmy Wael
GLOBALFOUNDRIES Inc.
Salerno Sarah
Williams Morgan & Amerson P.C.
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