Electrical computers and digital processing systems: processing – Dynamic instruction dependency checking – monitoring or...
Reexamination Certificate
2007-09-04
2011-12-20
Pan, Daniel (Department: 2183)
Electrical computers and digital processing systems: processing
Dynamic instruction dependency checking, monitoring or...
C712S217000, C712S219000
Reexamination Certificate
active
08082421
ABSTRACT:
A program instruction rearrangement method calculates the dependency depth of each instruction of a program based on dependency between instructions, based on register access order, and rearranging instructions based on the dependency depth. Additionally, the dependency between instructions can be utilized to locate and remove redundant instructions.
REFERENCES:
patent: 5812810 (1998-09-01), Sager
patent: 5850552 (1998-12-01), Odani et al.
patent: 5867644 (1999-02-01), Ranson et al.
patent: 6138230 (2000-10-01), Hervin et al.
patent: 6260190 (2001-07-01), Ju
patent: 7571302 (2009-08-01), Chen et al.
patent: 2004/0154006 (2004-08-01), Heishi et al.
patent: 2004/0199752 (2004-10-01), Winberg et al.
patent: 200703143 (2007-01-01), None
TW Office Action mailed Apr. 2, 2010.
Pan Daniel
Thomas|Kayden
Via Technologies Inc.
LandOfFree
Program instruction rearrangement methods in computer does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Program instruction rearrangement methods in computer, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Program instruction rearrangement methods in computer will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-4267030