Parallel accessible memory device

Details Parallel accessible memory device Parallel accessible memory device

1988-03-30

1991-04-16

Fleming, Michael R.

Boots, shoes, and leggings

3649571, 3649575, 3649663, 3649664, 36523003, G06F 1200, G06F 1206, G11C 800

Patent

active

050088521

ABSTRACT:
A parallel-accessible memory device of one or multiple dimensions has submemories for the respective dimensions. Each of the submemories has a capacity provided by dividing the total memory capacity by positive integers given for the respective dimensions. The memory device comprises an address converting section for generating addresses of the submemories of the respective dimensions according to dimensional addresses; a data rearranging section for rearranging input and output data of the submemories in a required order, the input and output data being specified by the submemory addresses from the address converting section; and a write controlling section for selectively renewing data in a region of the submemories of the respective dimensions.

REFERENCES:
patent: 4092728 (1978-05-01), Baltzer
patent: 4449199 (1984-05-01), Daigle
patent: 4570236 (1986-02-01), Rebel et al.
patent: 4603348 (1986-07-01), Yamada et al.
patent: 4667308 (1987-05-01), Hayes et al.
patent: 4675808 (1987-06-01), Grinn et al.
patent: 4740923 (1988-04-01), Kaneko et al.

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