Miscellaneous active electrical nonlinear devices – circuits – and – Specific identifiable device – circuit – or system – With specific source of supply or bias voltage
Patent
1996-12-24
1999-03-02
Callahan, Timothy P.
Miscellaneous active electrical nonlinear devices, circuits, and
Specific identifiable device, circuit, or system
With specific source of supply or bias voltage
327536, 327537, G05F 110
Patent
active
058776516
ABSTRACT:
A semiconductor device having an internal circuit to which a high voltage, higher than the power supply voltage, is supplied for carrying out a predetermined operation, and an internal high voltage circuit with a voltage replenishing circuit for replenishing high voltage consumed by the internal circuit when in an active state. A control circuit controls operation of the voltage replenishing circuit in response to the internal circuit changing in state between active and standby states. To reduce variation in magnitude of high voltage applied to the internal circuit, multiple detectors having a small difference in voltage thresholds control charge pumps of large and small capacity, respectively. The stability of an oscillator circuit driving each charge pump is improved using feedback to control the substrate potential of a transistor forming a part of the circuit.
REFERENCES:
patent: 4045743 (1977-08-01), Walker
patent: 4438349 (1984-03-01), Shoji
patent: 4961007 (1990-10-01), Kumonoya et al.
patent: 4964082 (1990-10-01), Sato et al.
patent: 5278458 (1994-01-01), Holland et al.
patent: 5367489 (1994-11-01), Park et al.
patent: 5382839 (1995-01-01), Shinohara
patent: 5394026 (1995-02-01), Yu et al.
patent: 5420530 (1995-05-01), Mita
"A Fast 256K.times.4 CMOS DRAM with a Distribution Sense and Unique Restore Circuit", Hiroshi Miyamoto, et al, IEEE Journal of Solid-State Circuits, vol. Sc-22, No. 5, Oct. 1987, pp. 861-867.
"A 4-Mb Pseudo SRAM Operating at 2.6.+-.1 V with 3-.mu.A Data Retention Current", Katsuyuki Sato, et al, IEEE Journal of Solid-State Circuits, vol. 26, No. 11, Nov. 1991, pp. 1556-1562.
"A 4-MB Pseudo SRAM Operating at 2.6+/-1 V with 3-.mu.ADATA Retention Current", Katsuyuki Sato et al., IEEE Journal of Solid-State Circuits, vol. 26, No. 11, Nov. 1991.
"A Fast 256K.times.4 CMOS DRAM with a Distributed Sense and Unique Restore Circuit", Hiroshi Miyamoto et al., IEEE Journal of Solid-State Circuits, vol. SC-22, No. 5, Oct. 1987.
Callahan Timothy P.
Kim Jung Ho
Mitsubishi Denki & Kabushiki Kaisha
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