High speed booster circuit

Details High speed booster circuit High speed booster circuit

1988-04-13

1990-03-06

Miller, Stanley D.

Electrical transmission or interconnection systems

Nonlinear reactor systems

Parametrons

307246, 307451, 307264, 307578, 307585, H03K 19094, H03K 1756, H03K 17687, H03L 500

Patent

active

049060562

ABSTRACT:
An output signal line is boosted at first by a first booster circuit using a second power supply. Thereafter, it is boosted by a second booster circuit using a third power supply.

REFERENCES:
patent: 3889135 (1975-06-01), Nomiya et al.
patent: 4061929 (1977-12-01), Asano
patent: 4382194 (1983-05-01), Nakano et al.
patent: 4649300 (1987-03-01), Schutz
patent: 4731552 (1988-03-01), Miyamoto
IEEE J. Sol. St. Circuits: "Fully Boosted 64K Dynamic RAM With Automatic and Self-Refresh" by M. Taniguchi et al, vol. SC-16, No. 5, Oct. 1981, pp. 492-498.
IEEE J. Sol. St. Circuits: "A 100 ns 5 V Only 64K.times.1 MOS Dynamic RAM" by J. Chan et al, vol. SC=-15, No. 5, Oct. 1980, pp. 839-846.

Affiliated with

Also associated with

Rating

High speed booster circuit does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with High speed booster circuit, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and High speed booster circuit will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-42607