Processer with flexible return from subroutine

Details Processer with flexible return from subroutine Processer with flexible return from subroutine

1990-09-19

1992-05-26

Hecker, Stuart N.

Boots, shoes, and leggings

364DIG1, 3642624, 364262, 364247, 3642478, 3649427, 3649428, 3649462, G06F 900

Patent

active

051174987

ABSTRACT:
A data processor in which return from subroutine execution is not dependent on the presence of a particular instruction at the end of the sequence of instructions comprising the subroutine. The disclosed embodiment comprises a micro-programmable processor designed for servicing a timer subsystem. The return from subroutine apparatus comprises a decrementor which may be enabled to decrement once for each instruction executed by the processor and a return address register. A jump to subroutine instruction loads a return address into the return address register, enables the decrementor and loads the program counter with the address of the first instruction of the subroutine. When the decremento reaches a count of zero, the return address is loaded into the program counter. Provision is also made for using the same hardward to execute a single instruction a predetermined number of times before proceeding to the next instruction.

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patent: 4709324 (1987-11-01), Kloker
patent: 4884196 (1989-11-01), Thiel et al.
patent: 4885682 (1989-12-01), Komoto

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