Packet switch for a transfer of data in asynchronous mode in a d

Details Packet switch for a transfer of data in asynchronous mode in a d Packet switch for a transfer of data in asynchronous mode in a d

1989-08-01

1992-05-26

Olms, Douglas W.

Multiplex communications

Wide area network

Packet switching

370 941, H04Q 1104

Patent

active

051174294

ABSTRACT:
The packet switch for asynchronous mode transfer in a transmission network is organized around a multiplexed bus which absorbs all the throughput. For this, the incoming trunk lines are connected to an 8-bit series/parallel adapter made with fast technology elements, followed by memory stacks associated with the incoming trunk lines, from which the pieces of data are removed at moderate speed in wider packets. A multiplexer transmits these pieces of data to the central bus. At this level, a centralized translation of the headers is done. Then the pieces of data are transmitted to the outgoing channels through a reversed structure, with output memory stacks restoring 8-bit words at moderate speed, and then an adapting circuit transmitting the series data at high speed to the outgoing arteries.

REFERENCES:
patent: 4603416 (1986-07-01), Servel et al.
patent: 4698802 (1987-10-01), Goke et al.
patent: 4796254 (1989-01-01), van Baardwijk et al.
patent: 4823340 (1989-04-01), Grassman et al.
patent: 4884264 (1989-11-01), Servel et al.
patent: 4910731 (1990-03-01), Sakurai et al.

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