High density row RAM for column parallel CMOS image sensors

Details High density row RAM for column parallel CMOS image sensors High density row RAM for column parallel CMOS image sensors

2009-01-13

2010-11-09

Young, Brian (Department: 2819)

Coded data generation or conversion

Analog to or from digital conversion

Analog to digital conversion

Reexamination Certificate

active

07830292

ABSTRACT:
A readout circuit of an imager that enables analog-to-digital converters (ADCs) to be shared between columns of the imager is provided. Groups of ADCs share a single block of memory for storing signals processed by the ADCs. The ADCs process signals received from one group of columns of pixels and, at a different time, the ADCs process signals from another group of columns of pixels. While one of the signals processed from a column is being stored in a first memory bank, signals previously processed and stored in a second memory bank are being readout of the storage locations and provided downstream for further processing.

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Combined Search and Examination Report dated Feb. 11, 2009.

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