Semiconductor memory apparatus having decreased leakage current

Static information storage and retrieval – Powering

Reexamination Certificate

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C365S189090, C365S230060

Reexamination Certificate

active

07835216

ABSTRACT:
A semiconductor memory apparatus includes a MOS transistor configured to be supplied with a first voltage through a bulk terminal thereof. The semiconductor memory apparatus also includes a current control unit configured to be connected to a source terminal of the MOS transistor, receive a power down mode enable signal and a self refresh mode enable signal, apply a second voltage to the source terminal during a power down mode or a self refresh mode, and apply the first voltage to the source terminal during modes other than the power down mode and the self refresh mode.

REFERENCES:
patent: 5801585 (1998-09-01), Roohparvar
patent: 7447084 (2008-11-01), Heo et al.
patent: 7656720 (2010-02-01), Ito et al.
patent: 7672184 (2010-03-01), Im et al.
patent: 2008/0273413 (2008-11-01), Horiguchi et al.
patent: 2010/0135065 (2010-06-01), Ito et al.
patent: 1020060123985 (2006-12-01), None
patent: 10-0700331 (2007-03-01), None

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