Transmit flow for network acceleration architecture

Details Transmit flow for network acceleration architecture Transmit flow for network acceleration architecture

2005-05-19

2010-06-08

Ryman, Daniel J (Department: 2466)

Multiplex communications

Pathfinding or routing

Switching a message which includes an address header

C709S250000, C709S212000, C370S412000

Reexamination Certificate

active

07733875

ABSTRACT:
A method for receiving data in a network acceleration architecture for use with TCP (transport control protocol), iSCSI (Internet Small Computer System Interface) and/or RDMA (Remote Direct Memory Access) over TCP, including providing a hardware acceleration engine, called a streamer, adapted for communication with and processing data from a consumer application in a system that supports TCP, iSCSI and RDMA over TCP, providing a software protocol processor adapted for carrying out TCP implementation, the software control processor being called a TCE (TCP Control Engine), wherein the streamer and the TCE are adapted to operate asynchronously and independently of one another, and transmitting a TCP segment with the streamer.

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Regnier, Greg et al., “ETA: Experience with an Intel Xeon Processor as a Packet Processing Engine”, Micro, IEEE, Publication Date: Jan-Feb. 2004, vol. 24, Issue 1, pp. 24-31.

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