Test mode activation circuit

Details Test mode activation circuit Test mode activation circuit

1986-11-17

1989-06-06

Eisenzopf, Reinhard J.

Electricity: measuring and testing

Measuring, testing, or sensing electricity, per se

With rotor

324 73R, 307241, 307242, G01R 3100, H03K 1756

Patent

active

048375055

ABSTRACT:
A test mode activation circuit preferably defined as part of a semiconductor integrated circuit device, such as ROM, has a two-stage structure. The first stage has a first input terminal and a plurality of first output terminals, the voltage of each of which is uniquely determined depending on the voltage level of an input signal applied to the first input terminal. The second stage has a plurality of second input terminals, which are selectively connectable to the plurality of first output terminals, and a second output terminal for outputting a test mode activation signal. A logic function between the second input and output terminals is uniquely determined by an electrical connection pattern between the first and second stages. Thus, only when an input signal having a particular sequential voltage variation pattern is applied to the first input terminal, the test mode activation signal is output from the second output terminal.

REFERENCES:
patent: 2556200 (1951-06-01), Lesti
patent: 3805171 (1974-04-01), Drumheller

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