Method to reduce error in time interleaved analog-to-digital...

Details Method to reduce error in time interleaved analog-to-digital... Method to reduce error in time interleaved analog-to-digital...

2009-02-27

2010-11-30

Jeanglaude, Jean B (Department: 2819)

Coded data generation or conversion

Analog to or from digital conversion

Analog to digital conversion

C341S156000, C341S172000

Reexamination Certificate

active

07843373

ABSTRACT:
A system for randomizing aperture delay in a time interleaved ADC system that includes a plurality of selection switch stages corresponding to each of the ADCs in the system and a second selection switch stage coupled to a voltage source. A plurality of conductors extend between the second selection switch stage and each of the selection switch stages, in excess of the number of ADCs in the system. For each of N ADCs in the system, the selection switch stages and the second selection switch stage support at least N+1 selectable conductive paths extending from each of the sampling capacitors of the ADCs to the voltage source. Random selection of the N+1 paths can randomize aperture delay.

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PCT International Search Report and Written Opinion mailed on Apr. 12, 2010, from PCT/US10/23888.

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