Fabrication method of non-volatile memory

Details Fabrication method of non-volatile memory Fabrication method of non-volatile memory

2006-12-21

2010-06-08

Brewster, William M. (Department: 2823)

Semiconductor device manufacturing: process

Packaging or treatment of packaged semiconductor

Assembly of plural semiconductive substrates each possessing...

C438S257000, C438S300000, C438S350000

Reexamination Certificate

active

07732256

ABSTRACT:
A method of fabrication a non-volatile memory is provided. A stacked structure is formed on a substrate, the stacked structure including a gate dielectric layer and a control gate. Then, a first dielectric layer, a second dielectric layer and a third dielectric layer are respectively formed on the top and sidewalls of the stacked structure and the exposed substrate. Thereafter, a pair of charge storage layers are formed over the substrate to respectively cover a portion of the top and sidewalls of the stacked structure, and a gap exists between each of the charge storage layers.

REFERENCES:
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patent: 6825523 (2004-11-01), Caprara et al.
patent: 7045854 (2006-05-01), Osabe et al.
patent: 2004/0256657 (2004-12-01), Hung et al.

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