Semiconductor intergrated circuit device

Active solid-state devices (e.g. – transistors – solid-state diode – Combined with electrical contact or lead – Chip mounted on chip

Reexamination Certificate

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Details

C257S203000, C257SE27026, C257SE25029, C257SE23169, C365S185230, C365S230060

Reexamination Certificate

active

07663247

ABSTRACT:
A semiconductor integrated circuit device includes a semiconductor chip, a memory cell array arranged on the semiconductor chip and first and second decoder strings arranged along both ends of the memory cell array. The arrangement position of the first decoder string is deviated from the arrangement position of the second decoder string and a space caused by the deviation is arranged in the corner of the semiconductor chip.

REFERENCES:
patent: 5553016 (1996-09-01), Takebuchi
patent: 6274928 (2001-08-01), Casper et al.
patent: 6362994 (2002-03-01), Raad
patent: 7408262 (2008-08-01), Hara
patent: 2003/0123320 (2003-07-01), Wright et al.
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patent: 62-11262 (1987-01-01), None
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patent: 3-203085 (1991-09-01), None
patent: 3-214669 (1991-09-01), None
patent: 2001-217383 (2001-08-01), None
patent: 1991-0020721 (1991-12-01), None
patent: 1999-0036789 (1999-05-01), None

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