Static information storage and retrieval – Addressing – Sync/clocking
Reexamination Certificate
2009-01-15
2010-06-29
Lam, David (Department: 2827)
Static information storage and retrieval
Addressing
Sync/clocking
C365S194000, C365S189050, C365S199000
Reexamination Certificate
active
07746723
ABSTRACT:
A semiconductor memory device includes: a variable delay for delaying a delay locked loop (DLL) clock by a predetermined delay time to output a delayed DLL clock; an output driver for outputting data and data strobe signal in response to the delayed DLL clock; and a calibration controller for controlling the predetermined delay time of the variable delay in response to output AC parameters.
REFERENCES:
patent: 6859404 (2005-02-01), Kim
patent: 6990042 (2006-01-01), Stark
patent: 6996026 (2006-02-01), Brox et al.
patent: 7171321 (2007-01-01), Best
patent: 10-2005-0020359 (2005-03-01), None
patent: 10-2005-0048755 (2005-05-01), None
patent: 10-2005-0109813 (2005-11-01), None
Oh Young-Hoon
Rho Kwang-Myoung
Hynix / Semiconductor Inc.
IP & T Law Firm PLC
Lam David
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