Integrated memory circuit

Details Integrated memory circuit Integrated memory circuit

1986-10-09

1989-01-24

Fears, Terrell W.

Static information storage and retrieval

Addressing

Sync/clocking

365 73, 365189, G11C 1300

Patent

active

048005347

ABSTRACT:
An integrated memory circuit includes a memory loop which comprises two gates which are controlled by a clock signal. The circuit is susceptible to a race condition so that correct operation cannot always be ensured. The "race" problem is solved by choosing the switching thresholds of the gate inputs receiving the clock signal so that the gates respond successively instead of (sustantially) simultaneously to the clock signal. The correct switching sequence of the gates and the correct operation of the memory circuit can thus be ensured.

REFERENCES:
patent: 4649511 (1987-03-01), Gdula

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