Semiconductor memory device

Details Semiconductor memory device Semiconductor memory device

2008-06-10

2010-11-30

Luu, Pho M (Department: 2824)

Static information storage and retrieval

Addressing

Including particular address buffer or latch circuit...

C365S230040, C365S233100

Reexamination Certificate

active

07843761

ABSTRACT:
A semiconductor memory device is capable of securing margins of setup/hold times for receiving addresses. The device includes an address buffering unit, a data input/output line, a selecting unit and an output circuit. The address buffering unit buffers input addresses. The data input/output line transfers data with a cell array. The selecting unit selectively outputs the buffered addresses transferred from the address buffering unit and the data transferred through the data input/output line according to modes of the device. The output circuit latches an output of the selecting unit to be outputted from the device.

REFERENCES:
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patent: 6425062 (2002-07-01), Kendall et al.
patent: 7203107 (2007-04-01), Yeh
patent: 7372766 (2008-05-01), Park et al.
Foreign Office Action issued on Sep. 22, 2008, KR application No. 10-2007-0097149.

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