Static information storage and retrieval – Floating gate – Multiple values
Reexamination Certificate
2009-05-11
2010-10-26
Tran, Michael T (Department: 2827)
Static information storage and retrieval
Floating gate
Multiple values
C365S185240
Reexamination Certificate
active
07821827
ABSTRACT:
A threshold voltage distribution scheme for multi-level Flash cells where an erase threshold voltage and at least one programmed threshold voltage lie in an erase voltage domain. Having at least one programmed threshold voltage in the erase voltage domain reduces the Vread voltage level to minimize read disturb effects, while extending the life span of the multi-level Flash cells as the threshold voltage distance between programmed states is maximized. The erase voltage domain can be less than 0V while a program voltage domain is greater than 0V. Accordingly, circuits for program verifying and reading multi-level Flash cells having a programmed threshold voltage in the erase voltage domain and the program voltage domain use negative and positive high voltages.
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Borden Ladner Gervais LLP
Hung Shin
MOSAID Technologies Incorporated
Tran Michael T
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