Register-stack apparatus

Details Register-stack apparatus Register-stack apparatus

1986-11-17

1989-01-24

Heckler, Thomas M.

Boots, shoes, and leggings

G06F 1200, G11C 700

Patent

active

048004910

ABSTRACT:
A register-stack apparatus comprising first and second registers, first and second stack memories respectively coupled to store the register contents, first and second modifiers for providing the respective register contents in predetermined modified forms, and first and second select means for receiving a plurality of inputs including the modified register contents and, in accordance with a control command, applying a single output to the respective registers for storage therein, is disclosed. The register-stack apparatus is implemented in the controller of a computing system in which the controller receives macro-instructions from a host computer and, in response, provides microcode to an attached computing device. The register-stack apparatus is implemented as a program counter, I/O device, and plurality of register files and enables execution of CALLs, INTERRUPTs, and RETURNs with a minimal number of no-op instructions being issued to the attached computing device.

REFERENCES:
patent: 3757308 (1973-09-01), Fosdick
patent: 3984670 (1976-10-01), Erickson et al.
patent: 4075687 (1978-02-01), Nissen et al.
patent: 4138732 (1979-02-01), Suzuki et al.
patent: 4398244 (1983-08-01), Chu et al.
patent: 4488227 (1984-12-01), Miu et al.

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