Variable delay instruction for implementation of temporal...

Data processing: software development – installation – and managem – Software program development tool – Testing or debugging

Reexamination Certificate

Rate now

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Details

C714S021000

Reexamination Certificate

active

07861228

ABSTRACT:
A method for detecting computational errors in a digital processor executing a program. The program is divided into a plurality of computation sections, and two functionally identical code segments, respectively comprising a primary segment and a secondary segment, are generated for one of the computation sections. The primary segment is executed, after which a temporal diversity timer is started. The secondary segment is then executed upon expiration of the timer. The respective results of execution of the primary segment and the secondary segment are compared after completion of execution of the secondary segment, and an error indication is provided if the respective results are not identical.

REFERENCES:
patent: 5517628 (1996-05-01), Morrison et al.
patent: 6058491 (2000-05-01), Bossen et al.
patent: 6550015 (2003-04-01), Craycraft et al.
patent: 7308607 (2007-12-01), Reinhardt et al.
patent: 7318169 (2008-01-01), Czajkowski
patent: 7380192 (2008-05-01), Nicolaidis
patent: 2005/0105639 (2005-05-01), Tahara et al.
patent: 60-198645 (1985-10-01), None
patent: 62-293441 (1997-12-01), None
patent: 10-11309 (1998-10-01), None
patent: 2003-316559 (2003-11-01), None
George Varghese and Tony Lauck, Hashed and Hierarchical Timing Wheels: Efficient Data Structures for Implementing a Timer Facility, IEEE/ACM Transactions on Networking, Dec. 1997, vol. 5, No. 6, p. 824-34, 26 refs, CODEN: IEANEP, ISSN: 1063-6692, Publisher: IEEE; ACM, USA.
Eric Rotenberg, Ar-smt: Coarse-grain time redundancy for high performance general purpose processors, Univ. of Wisc. Course Project (ECE753), 1998.
Eric Rotenberg, AR-SMT: a microarchitectural approach to fault tolerance in microprocessors Fault-Tolerant Computing, 1999. Digest of Papers. Twenty-Ninth Annual International Symposium on Jun. 15-18, 1999 pp. 84-91.
Gurindar Sohi, Manoj Franklin, Kewal Saluja, A study of time-redundant fault tolerance techniques forhigh-performance pipelined computers, Fault-Tolerant Computing, 1989. FTCS-19. Digest of Papers., Nineteenth International Symposium Publication Date: Jun. 21-23, 1989, on pp. 436-443.
Nahmsuk Oh and Philip P. Shirvani and Edward J. Mccluskey, Error detection by duplicated instructions in super-scalar processors, IEEE Transactions on Reliability, 2002, vol. 51, pp. 63-75.
Oh, N., P. P. Shirvani, and E. J. McCluskey, “Error Detection by Duplicating Instructions in Super-scalar Processors,” CRC TR 00-5, Apr. 2000. Available from http://crc.stanford.edu/bibliography.html.
Mukherjee, Shubhendu S.; Kontz, Michael, and Reinhardt, Steven K; “Detailed Design and Evaluation of Redundant Mutlithreading Alternative”; 29th Annual International Symposium on Computer Architecture (ISCA) pp. 1-12, 2002.
Mukherjee, Shubu; “An Architectural Perspective on Soft Errors From Cosmic Radiation”; 44th IFIP WG10.4 Workshop on Hardware Design and Dependability, pp. 1-58; Jun. 28, 2003.
Japan Office Action, dated Nov. 22, 2006, 2 pages.
Japan Office Action, dated Apr. 4, 2007, 2 pages.

LandOfFree

Say what you really think

Search LandOfFree.com for the USA inventors and patents. Rate them and share your experience with other people.

Rating

Variable delay instruction for implementation of temporal... does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Variable delay instruction for implementation of temporal..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Variable delay instruction for implementation of temporal... will most certainly appreciate the feedback.

Rate now

     

Profile ID: LFUS-PAI-O-4211383

  Search
All data on this website is collected from public sources. Our data reflects the most accurate information available at the time of publication.