Fishing – trapping – and vermin destroying
Patent
1989-07-21
1991-04-16
Hearn, Brian E.
Fishing, trapping, and vermin destroying
437 38, 437 47, 437 51, 437 60, 437193, 437195, 437228, 437233, 437919, H01L 2170
Patent
active
050082140
ABSTRACT:
A dynamic random access memory cell array is disclosed which has storage capacitors and access transistors formed on the sidewalls of pillars created by trenches etched into the face of a semiconductor bar. A storage capacitor for a cell uses the sidewalls of the pillar as one plate and a polysilicon plug or web as the other plate. The channel of each access transistor is formed in the upper part of the sidewall of only a portion of the pillar, using an upper edge of the capacitor region as the source region of the transistor and having an N+ drain region at the top of the pillar. A cross-point array is made possible by merging two adjacent wordlines as a pair of overlying conductor strips extending along the face over the trenches, between pillars, and forming the transistor gates by alternate protrusions from these strips, extending down into the trenches at the channel area.
REFERENCES:
patent: 4737829 (1988-04-01), Morimoto et al.
patent: 4769786 (1988-09-01), Garnache et al.
Demond Thomas W.
Hearn Brian E.
Neerings Ronald O.
Sharp Melvin
Texas Instruments Incorporated
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