Semiconductor device with an improved operating property

Active solid-state devices (e.g. – transistors – solid-state diode – Combined with electrical contact or lead – Of specified configuration

Reexamination Certificate

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Details

C257S069000, C257S206000, C257S274000, C257S368000, C257S369000, C257S374000, C257SE23145

Reexamination Certificate

active

07821138

ABSTRACT:
The semiconductor comprises an n-channel transistor forming region and a p-channel transistor forming region, which are disposed while being sectioned by an element isolation region. The stress caused by contact plugs in the n-channel transistor forming region and the stress caused by contact plugs in the p-channel transistor forming region are made different from each other. With this, it enables to increase the drive current of both the n-channel transistor and p-channel transistor without changing the dimensions of the active region and the element isolation region.

REFERENCES:
patent: 6982465 (2006-01-01), Kumagai et al.
patent: 10-173065 (1998-06-01), None
patent: 2001-332706 (2001-11-01), None
patent: 2002-246464 (2002-08-01), None
patent: 2003-086708 (2003-03-01), None
patent: 2003-179157 (2003-06-01), None
patent: 2004-335741 (2004-11-01), None
Japanese Office Action issued in Japanese Patent Application No. JP 2004-366215 dated Dec. 15, 2009.

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