Semiconductor memory apparatus capable of reducing ground noise

Details Semiconductor memory apparatus capable of reducing ground noise Semiconductor memory apparatus capable of reducing ground noise

2009-01-26

2010-11-16

Pham, Ly D (Department: 2827)

Static information storage and retrieval

Powering

C365S051000, C365S063000, C365S230030

Reexamination Certificate

active

07835214

ABSTRACT:
An apparatus includes a plurality of first driving signal driving units, and generates a first driving signal by driving an input signal, a plurality of second driving signal driving units, each of which drives an input signal and generates a second driving signal, a timing control unit that controls each of the first driving signal driving units such that a predetermined time difference is generated between an enable timing of the first driving signal and an enable timing of the second driving signal, a plurality of sense amplifier driving units, each of which generates a first driving level and a second driving level according to the first driving signal and the second driving signal, and a plurality of sense amplifiers that are provided for respective bit line pairs, and each include first type switching elements operating according to the first driving level and second type switching elements operating according to the second driving level.

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