Pipelined packet switching and queuing architecture

Multiplex communications – Pathfinding or routing – Switching a message which includes an address header

Reexamination Certificate

Rate now

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Details

C370S389000, C370S412000

Reexamination Certificate

active

07809009

ABSTRACT:
An architecture for a line card in a network routing device is provided. The line card architecture provides a bi-directional interface between the routing device and a network, both receiving packets from the network and transmitting the packets to the network through one or more connecting ports. In both the receive and transmit path, packets processing and routing in a multi-stage, parallel pipeline that can operate on several packets at the same time to determine each packet's routing destination is provided. Once a routing destination determination is made, the line card architecture provides for each received packet to be modified to contain new routing information and additional header data to facilitate packet transmission through the switching fabric. The line card architecture further provides for the use of bandwidth management techniques in order to buffer and enqueue each packet for transmission through the switching fabric to a corresponding destination port. The transmit path of the line card architecture further incorporates additional features for treatment and replication of multicast packets.

REFERENCES:
patent: 4849968 (1989-07-01), Turner
patent: 6101599 (2000-08-01), Wright et al.
patent: 6119215 (2000-09-01), Key et al.
patent: 6173386 (2001-01-01), Key et al.
patent: 6175571 (2001-01-01), Haddock et al.
patent: 6195739 (2001-02-01), Wright et al.
patent: 6272621 (2001-08-01), Key et al.
patent: 6501733 (2002-12-01), Falco et al.
patent: 6513108 (2003-01-01), Kerr et al.
patent: 6711170 (2004-03-01), Brown
patent: 6775279 (2004-08-01), Murai et al.
patent: 6785236 (2004-08-01), Lo et al.
patent: 6810426 (2004-10-01), Mysore et al.
patent: 6813243 (2004-11-01), Epps et al.
patent: 6831923 (2004-12-01), Laor et al.
patent: 6895481 (2005-05-01), Mitten et al.
patent: 6959323 (2005-10-01), Tzeng et al.
patent: 6961341 (2005-11-01), Krishnan
patent: 6977930 (2005-12-01), Epps et al.
patent: 6980552 (2005-12-01), Belz et al.
patent: 7039914 (2006-05-01), Potter, Jr.
patent: 7061909 (2006-06-01), Blanc et al.
patent: 7100020 (2006-08-01), Brightman et al.
patent: 7131125 (2006-10-01), Modelski et al.
patent: 7177276 (2007-02-01), Epps et al.
patent: 7180056 (2007-02-01), Ohtake et al.
patent: 7180856 (2007-02-01), Breslau et al.
patent: 7206858 (2007-04-01), Hooper et al.
patent: 7236465 (2007-06-01), Banerjee et al.
patent: 7237016 (2007-06-01), Schober
patent: 7257083 (2007-08-01), Bansal et al.
patent: 7269348 (2007-09-01), Tse-Au
patent: 7292578 (2007-11-01), Kerr et al.
patent: 7301905 (2007-11-01), Tontiruttananon et al.
patent: 7304944 (2007-12-01), Bitar et al.
patent: 7304996 (2007-12-01), Swenson et al.
patent: 7313093 (2007-12-01), Eatherton et al.
patent: 7330468 (2008-02-01), Tse-Au
patent: 7333484 (2008-02-01), Henderson et al.
patent: 7342942 (2008-03-01), Parruck et al.
patent: 7349403 (2008-03-01), Lee et al.
patent: 7350208 (2008-03-01), Shoham
patent: 7356750 (2008-04-01), Fukushima et al.
patent: 7369500 (2008-05-01), Gallagher et al.
patent: 7382787 (2008-06-01), Barnes et al.
patent: 7426215 (2008-09-01), Romano et al.
patent: 7680116 (2010-03-01), Lim et al.
patent: 2002/0085586 (2002-07-01), Tzeng
patent: 2002/0131413 (2002-09-01), Tsao et al.
patent: 2003/0002517 (2003-01-01), Takajitsuko et al.
patent: 2003/0179754 (2003-09-01), Shankar et al.
patent: 2003/0214964 (2003-11-01), Shoham et al.
patent: 2003/0231594 (2003-12-01), Xu et al.
patent: 2004/0004972 (2004-01-01), Lakshmanamurthy et al.
patent: 2004/0037302 (2004-02-01), Varma et al.
patent: 2004/0184444 (2004-09-01), Aimoto et al.
patent: 2004/0258072 (2004-12-01), Deforche
patent: 2005/0031097 (2005-02-01), Rabenko et al.
patent: 2005/0111461 (2005-05-01), Khan et al.
patent: 2005/0135243 (2005-06-01), Lee et al.
patent: 2005/0135398 (2005-06-01), Muthukrishnan
patent: 2005/0141424 (2005-06-01), Lim et al.
patent: 2005/0175014 (2005-08-01), Patrick
patent: 2005/0243853 (2005-11-01), Bitar et al.
patent: 2005/0259574 (2005-11-01), Figueira et al.
patent: 2006/0002386 (2006-01-01), Yik et al.
patent: 2006/0013133 (2006-01-01), Peng et al.
patent: 2006/0039374 (2006-02-01), Belz et al.
patent: 2006/0050690 (2006-03-01), Epps et al.
patent: 2006/0092934 (2006-05-01), Chung et al.
patent: 2006/0187949 (2006-08-01), Seshan et al.
patent: 2006/0203819 (2006-09-01), Farinacci et al.
patent: 2006/0268913 (2006-11-01), Singh et al.
patent: 2007/0070895 (2007-03-01), Narvaez
patent: 2007/0195761 (2007-08-01), Tatar et al.
patent: 2007/0195773 (2007-08-01), Tatar et al.
patent: 2007/0195777 (2007-08-01), Tatar et al.
patent: 2007/0195778 (2007-08-01), Tatar et al.
patent: 2008/0117913 (2008-05-01), Tatar et al.
Floyd et al., “Random Early Detection Gateways for Congestion Avoidance,” IEEE/ATM Transactions on Networking, Aug. 1993, pp. 1-22.

LandOfFree

Say what you really think

Search LandOfFree.com for the USA inventors and patents. Rate them and share your experience with other people.

Rating

Pipelined packet switching and queuing architecture does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Pipelined packet switching and queuing architecture, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Pipelined packet switching and queuing architecture will most certainly appreciate the feedback.

Rate now

     

Profile ID: LFUS-PAI-O-4200438

  Search
All data on this website is collected from public sources. Our data reflects the most accurate information available at the time of publication.