Active solid-state devices (e.g. – transistors – solid-state diode – Heterojunction device – Field effect transistor
Reexamination Certificate
2007-10-26
2010-12-21
Nguyen, Thinh T (Department: 2818)
Active solid-state devices (e.g., transistors, solid-state diode
Heterojunction device
Field effect transistor
C257S192000, C257S189000, C257SE29246
Reexamination Certificate
active
07855402
ABSTRACT:
In a HEMT with a spacer layer composed of a 3 nm-thick intrinsic InAlAs layer, a supply layer composed of a 4 nm-thick n-type InAlAs layer, and a barrier layer composed of a 5 nm-thick intrinsic InAlAs layer, the spacer layer and supply layer exist between a channel layer and a planar-doped layer and the total thickness of these layers is approximately 7 nm. For this reason, the impurity (Si) in the planar-doped layer never diffuses into the channel layer, making available an excellent low-noise characteristic. In addition, since an intrinsic semiconductor layer is used as the barrier layer, it is possible to obtain an adequate gate withstand voltage even if the barrier layer is made thinner. It is therefore possible to cancel the degradation of the transconductance gm by thinning the barrier layer.
REFERENCES:
patent: 5677553 (1997-10-01), Yamamoto et al.
patent: 2002/0139994 (2002-10-01), Imanishi
patent: 8-55979 (1996-02-01), None
patent: 9-139494 (1997-05-01), None
patent: 11-214676 (1999-08-01), None
Fujitsu Limited
Kratz Quintos & Hanson, LLP
Nguyen Thinh T
LandOfFree
Compound semiconductor device and method for fabricating the... does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Compound semiconductor device and method for fabricating the..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Compound semiconductor device and method for fabricating the... will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-4198797