Active solid-state devices (e.g. – transistors – solid-state diode – Regenerative type switching device – With resistive region connecting separate sections of device
Reexamination Certificate
2006-06-28
2010-06-01
Dickey, Thomas L (Department: 2826)
Active solid-state devices (e.g., transistors, solid-state diode
Regenerative type switching device
With resistive region connecting separate sections of device
C257SE27079
Reexamination Certificate
active
07728350
ABSTRACT:
One aspect of this disclosure relates to a memory cell. In various embodiments, the memory cell includes an access transistor having a floating node, and a diode connected between the floating node and a diode reference potential line. The diode includes an anode, a cathode, and an intrinsic region between the anode and the cathode. A charge representative of a memory state of the memory cell is held across the intrinsic region of the diode. In various embodiments, the memory cell is implemented in bulk semiconductor technology. In various embodiments, the memory cell is implemented in semiconductor-on-insulator technology. In various embodiments, the diode is gate-controlled. In various embodiments, the diode is charge enhanced by an intentionally generated charge in a floating body of an SOI access transistor. Various embodiments include laterally-oriented diodes (stacked and planar configurations), and various embodiments include vertically-oriented diodes. Other aspects and embodiments are provided herein.
REFERENCES:
patent: 2794917 (1957-06-01), Shockley
patent: 2899646 (1959-08-01), Read
patent: 3858060 (1974-12-01), Kenyon
patent: 3918033 (1975-11-01), Case et al.
patent: 3964085 (1976-06-01), Kahng et al.
patent: 3978577 (1976-09-01), Bhattacharyya et al.
patent: 4068217 (1978-01-01), Arnett et al.
patent: 4488262 (1984-12-01), Basire et al.
patent: 4692785 (1987-09-01), Wada
patent: 4754310 (1988-06-01), Coe
patent: 4791604 (1988-12-01), Lienau et al.
patent: 4829482 (1989-05-01), Owen
patent: 4870470 (1989-09-01), Bass, Jr. et al.
patent: 5043946 (1991-08-01), Yamauchi et al.
patent: 5144390 (1992-09-01), Matloubian
patent: 5145802 (1992-09-01), Tyson et al.
patent: 5361225 (1994-11-01), Ozawa
patent: 5382814 (1995-01-01), Ashley et al.
patent: 5396454 (1995-03-01), Nowak
patent: 5488243 (1996-01-01), Tsuruta et al.
patent: 5557569 (1996-09-01), Smayling et al.
patent: 5587604 (1996-12-01), Machesney et al.
patent: 5621683 (1997-04-01), Young
patent: 5627779 (1997-05-01), Odake et al.
patent: 5684737 (1997-11-01), Wang et al.
patent: 5686739 (1997-11-01), Baba
patent: 5801993 (1998-09-01), Choi
patent: 5814853 (1998-09-01), Chen
patent: 5963476 (1999-10-01), Hung et al.
patent: 5981335 (1999-11-01), Chi
patent: 6049109 (2000-04-01), Omura et al.
patent: 6104045 (2000-08-01), Forbes et al.
patent: 6118152 (2000-09-01), Yamaguchi et al.
patent: 6184539 (2001-02-01), Wu et al.
patent: 6201734 (2001-03-01), Sansbury et al.
patent: 6229161 (2001-05-01), Nemati et al.
patent: 6243296 (2001-06-01), Sansbury
patent: 6248626 (2001-06-01), Kumar et al.
patent: 6291832 (2001-09-01), Krivokapic
patent: 6294412 (2001-09-01), Krivokapic
patent: 6294427 (2001-09-01), Furuhata et al.
patent: 6366501 (2002-04-01), Thurgate et al.
patent: 6462359 (2002-10-01), Nemati et al.
patent: 6465844 (2002-10-01), Saito et al.
patent: 6545297 (2003-04-01), Noble et al.
patent: 6574143 (2003-06-01), Nakazato
patent: 6580137 (2003-06-01), Parke
patent: 6600188 (2003-07-01), Jiang et al.
patent: 6611452 (2003-08-01), Han
patent: 6617651 (2003-09-01), Ohsawa
patent: 6638627 (2003-10-01), Potter
patent: 6653174 (2003-11-01), Cho et al.
patent: 6653175 (2003-11-01), Nemati et al.
patent: 6653665 (2003-11-01), Kajiyama
patent: 6660616 (2003-12-01), Babcock et al.
patent: 6661042 (2003-12-01), Hsu
patent: 6674120 (2004-01-01), Fujiwara
patent: 6774436 (2004-08-01), Yu et al.
patent: 6804149 (2004-10-01), Ogura et al.
patent: 6812504 (2004-11-01), Bhattacharyya
patent: 6845034 (2005-01-01), Bhattacharyya
patent: 6881994 (2005-04-01), Lee et al.
patent: 6888200 (2005-05-01), Bhattacharyya
patent: 6903969 (2005-06-01), Bhattacharyya
patent: 6917078 (2005-07-01), Bhattacharyya
patent: 6965129 (2005-11-01), Horch et al.
patent: 7031182 (2006-04-01), Beigel et al.
patent: 7042027 (2006-05-01), Bhattacharyya
patent: 7145186 (2006-12-01), Bhattacharyya
patent: 7184312 (2007-02-01), Bhattacharyya
patent: 7245535 (2007-07-01), McCollum et al.
patent: 7291519 (2007-11-01), Bhattacharyya
patent: 7339830 (2008-03-01), Bhattacharyya
patent: 7440310 (2008-10-01), Bhattacharyya
patent: 7440317 (2008-10-01), Bhattacharyya
patent: 7456054 (2008-11-01), Bhattacharyya
patent: 7566601 (2009-07-01), Bhattacharyya
patent: 2001/0040644 (2001-11-01), Vu et al.
patent: 2002/0005549 (2002-01-01), Saito et al.
patent: 2002/0048190 (2002-04-01), King
patent: 2002/0105023 (2002-08-01), Kuo et al.
patent: 2002/0149060 (2002-10-01), Ogura et al.
patent: 2003/0042534 (2003-03-01), Bhattacharyya et al.
patent: 2003/0072126 (2003-04-01), Bhattacharyya
patent: 2003/0080370 (2003-05-01), Harari et al.
patent: 2003/0089942 (2003-05-01), Bhattacharyya
patent: 2003/0151948 (2003-08-01), Bhattacharyya et al.
patent: 2003/0160277 (2003-08-01), Bhattacharyya et al.
patent: 2004/0007734 (2004-01-01), Kato et al.
patent: 2004/0014304 (2004-01-01), Bhattacharyya
patent: 2004/0026728 (2004-02-01), Yoshida et al.
patent: 2004/0041206 (2004-03-01), Bhattacharyya
patent: 2004/0108537 (2004-06-01), Tiwari
patent: 2004/0155317 (2004-08-01), Bhattacharyya
patent: 2004/0246764 (2004-12-01), King
patent: 2005/0001232 (2005-01-01), Bhattacharyya
patent: 2005/0012119 (2005-01-01), Herner et al.
patent: 2005/0026353 (2005-02-01), Bhattacharya
patent: 2005/0026354 (2005-02-01), Bhattacharyya
patent: 2005/0047251 (2005-03-01), Bhattacharya
patent: 2005/0098800 (2005-05-01), Herner et al.
patent: 2005/0099839 (2005-05-01), Bhattacharyya
patent: 2005/0247962 (2005-11-01), Bhattacharyya
patent: 2005/0250261 (2005-11-01), Bhattacharyya
patent: 2005/0263763 (2005-12-01), Bhattacharyya
patent: 2005/0269628 (2005-12-01), King
patent: 2005/0280023 (2005-12-01), Bhattacharyya
patent: 2006/0043411 (2006-03-01), Bhattacharayya
patent: 2006/0227601 (2006-10-01), Bhattacharyya
patent: 2006/0245244 (2006-11-01), Bhattacharyya
patent: 2006/0246653 (2006-11-01), Bhattacharyya
patent: 2007/0138555 (2007-06-01), Bhattacharyya
patent: 2008/0237695 (2008-10-01), Shino
patent: 2008/0239789 (2008-10-01), Shino et al.
patent: 61-166078 (1986-07-01), None
Bauer, F, et al., “Design aspects of MOS controlled thyristor elements”,International Electron Devices Meeting 1989. Technical Digest, (1989),297-300.
Bhattacharyya, A., “Physical & Electrical Characteristics of LPCVD Silicon Rich Nitride”,ECS Technical Digest, J. Electrochem. Soc., 131(11), 691 RDP, New Orleans,(1984),469C.
Carter, R J., “Electrical Characterization of High-k Materials Prepared by Atomic Layer CVD”,IWGI, (2001),94-99.
Chang, H R., et al., “MOS trench gate field-controlled thyristor”,Technical Digest—International Electron Devices Meeting, (1989),293-296.
Choi, J D., et al., “A 0.15 um NAND Flash Technology With 0.11 um2 Cell Size for 1 Gbit Flash Memory”,IEDM Technical Digest, (2000),767-770.
Fazan, P, et al., “Capacitor-Less 1-Transistor DRAM”,IEEE International SOI Conference, (2002),10-13.
Frohman-Bentchkowsky, D, “An integrated metal-nitride-oxide-silicon (MNOS) memory”,Proceedings of the IEEE, 57(6), (Jun. 1969),1190-1192.
Han, Kwangseok, “Characteristics of P-Channel Si Nano-Crystal Memory”,IEDM Technical Digest, International Electron Devices Meeting, (Dec. 10-13, 2000),309-312.
Jagar, S, “Single grain thin-film-transistor (TFT) with SOI CMOS performance formed by metal-induced-lateral-crystallization”,International Electron Devices Meeting 1999. Technical Digest, (1999),293-6.
Kumar, M. J., “Lateral Schottky Rectifiers for Power Integrated Circuits”,International Workshop on the Physics of Semiconductor Devices,11th, 4746,Allied Publishers Ltd., New Delhi, India,(2002),414-421.
Lai, S K., et al., “Comparison and trends in Today's dominant E2 Technologies”,IEDM Technical Digest, (1986),580-583.
Nemati, F, et al., “A novel high density, low voltage SRAM cell with a vertical NDR device”,1998 Symposium on VLSI Technology Digest of Technical Papers, (1998),66-7.
Nemati, F, et al., “A novel thyristor-based SRAM cell (T-RAM) for h
Dickey Thomas L
Micro)n Technology, Inc.
Schwegman Lundberg & Woessner, P.A.
LandOfFree
Memory cell with negative differential resistance does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Memory cell with negative differential resistance, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Memory cell with negative differential resistance will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-4197056