Method for making bipolar and CMOS integrated circuit structures

Details Method for making bipolar and CMOS integrated circuit structures Method for making bipolar and CMOS integrated circuit structures

1987-10-02

1989-01-24

Hearn, Brian E.

Fishing, trapping, and vermin destroying

437 33, 437162, 437186, 437233, 437228, 156653, 156657, 357 34, 357 59, 148DIG10, 148DIG11, 148DIG117, 148DIG124, H01L 21365

Patent

active

048001716

ABSTRACT:
An improved method is described for constructing one or more integrated circuit components including bipolar and MOS devices on a silicon substrate without damaging areas of the substrate wherein active elements of the integrated circuit components will be formed. The method comprises forming multilayer pedestals of masking materials over the active regions of the substrate and subsequently removing these masking materials using wet etching to avoid damage to the substrate by dry etching.

REFERENCES:
patent: 4242791 (1981-01-01), Horng et al.
patent: 4318751 (1982-03-01), Horng
patent: 4381953 (1983-05-01), Ho et al.
patent: 4682409 (1987-07-01), Thomas et al.
patent: 4686763 (1987-08-01), Thomas et al.
patent: 4693782 (1975-09-01), Kikuchi et al.
Kooi et al., "Selective Oxidation . . . " Electrochem. Soc. Conf. Proc., 1973, pp. 860-879.

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